Q-switch Driver PCD-03 Series

Description

Adjustment of a high-voltage pulse either directly on the board (through built-in potentiometer) or remotely;

Galvanic Separation of the External Power.
Galvanic Separation of the Trigger Pulse.
- Voltage adjustment through the potentiometer on PCB only.
“On-the-fly” switching between Fast/Slow Operational Modes (used for specific engineering tasks).
Top HV can be increased to 6.6-6.8 kV if required.
Without galvanic separation and slow/fast switching, the size (length) can be reduced to 50 mm.
- Significantly reduced electro-magnetic noise;
- TTL input signal required (5÷8V);
- Highly reliable topology;
- Ultra-compact size – can be used for actively Q-switched, hand-held laser heads.

Technical Specifications

- Output voltage amplitude ¹ …………………………………………………………………………………. 3000 ÷ 4200 V
- Output voltage pulse-to-pulse instability …………………………………………………………… 1 %
- Max pulse current ………………………………………………………………………………………………… 20 A
- Max load capacitance ………………………………………………………………………………………….. 10 pF
- HV pulse rise time ²
  - Fast mode …………………………………………………………………………………………………….. 2 ÷ 4 nsec
  - Slow mode ……………………………………………………………………………………………………. 5 ÷ 10 nsec
- HV pulse duration (factory-set) ³ …………………………………………………………………………. 0.5 ÷ 1 μsec
- HV pulse fall time …………………………………………………………………………………………………. 3 ÷ 6 μsec
- Max HV pulse repetition rate ……………………………………………………………………………….. 100 Hz
- Trigger voltage (input impedance is 200 Ohms) …………………………………………………… 3 ÷ 12 V (+5V)
- Output pulse delay vs. trigger pulse ⁴ ………………………………………………………………….. 12 ÷ 20 nsec
- HV pulse jitter ………………………………………………………………………………………………………. < 0.6 nsec
- External powering requirements:
- Low voltage DC supply ………………………………………………………………………………………… 10.8 ÷ 13.2 V (+12V)
- Low voltage DC supply current ……………………………………………………………………………. 200 mA
- Operating temperature range ……………………………………………………………………………… –40 ÷ +60°C
- Dimensions (see the dimensional drawing below) …………………………………………… 95.6 × 31 × 12 mm³
- Mounting hole pattern (Ø 3.2 mm) ……………………………………………………………………… 89.4 × 24.8 mm

¹ Is set from the built-in potentiometer.
² Depends on the load inductance and output voltage amplitude.
³ Is set by manufacturer.
⁴ Delay depends on the trigger pulse. The higher trigger amplitude the shorter delay.

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A block diagram of the Pockels Cell Driver – 03

Pockels Cell Driver PCD-0 Standard Connection Diagram

Connector J1 (input) – 53261-0671 (MOLEX):
Pin 1   – power supply + 12 V & 250 mA max;
Pin 2   – power supply GND;
Pin 3   – trigger input + (3 ÷ 8) V; input impedance 200R; duration > 50 nsec;
Pin 4   – trigger GND;
Pin 5   – do not use;
Pin 6   – GND.
Connector J2 (output) – SM02B-BHSS (JST):
Pin 1   – positive high voltage output;
Pin 2   – negative high voltage output.

Pockels Cell Driver PCD-03. Optional Modifications.

PCD-03DV – Pockels Cell Driver with Dual-Voltage output.

Technical Specifications:

- Output voltage amplitude 1 ……………………………………………………………………………………… 4800 ÷ 6100 V
- Output voltage pulse-to-pulse instability …………………………………………………………… 1 %
- Max pulse current ………………………………………………………………………………………………………… 40 A
- Max load capacitance …………………………………………………………………………………………………. 30 pF
- HV pulse rise time 2

Fast mode ………………………………………………………………………………………………………………….. 1 ÷ 3 nsec
Slow mode ………………………………………………………………………………………………………………… 4 ÷ 12 nsec

- HV pulse duration 2 …………………………………………………………………………………………………….. 0.6 ÷ 1.2 μsec
- HV pulse fall time 2 ………………………………………………………………………………………………………. 6 ÷ 20 μsec
- Max HV pulse repetition rate ………………………………………………………………………………….. 500 Hz
- Trigger voltage (input impedance is 200 Ohms) …………………………………………….. 3 ÷ 12V (+5V)
- Output pulse delay vs. trigger pulse 3 ………………………………………………………………….. 15 ÷ 30 nsec
- HV pulse jitter ……………………………………………………………………………………………………………….. < 0.5 nsec
- External powering requirements:

Low voltage DC supply …………………………………………………………………………………………. 10.8 ÷ 13.2V (+12V)
Low voltage DC supply current ………………………………………………………………………… 250 mA max

- Operating temperature range …………………………………………………………………………………. –40 ÷ +60 °C
- Dimensions …………………………………………………………………………………………………………………….. 95.6 × 31 × 12 mm3
- Mounting hole pattern (Æ 3.2 mm) ………………………………………………………………………. 89.4 × 24.8 mm

1. Is set from the built-in potentiometer.
2. Depends on the load impedance and output voltage amplitude.

3. Delay depends on the trigger pulse. The higher trigger amplitude the shorter delay.

Connector J1 (input) – 53261-0671 (MOLEX):
Pin 1   – power supply + 12 V & 200 mA max;
Pin 2   – power supply GND;
Pin 3   – trigger input + (3 ÷ 12) V; input impedance 200R; duration > 50 ns;
Pin 4   – trigger GND;
Pin 5   – mode switching:     0V (or not connected) – full voltage fast mode (if the JP1 is not soldered); 5V (or 3 ÷ 12 V) – half voltage slow mode.
Pin 6   – mode switching GND.
Connector J2 (output) – SM02B-BHSS (JST):
Pin 1   – positive high voltage output;
Pin 2   – negative high voltage output.
Transmission oscillograms for the Pockels Cell optical gate for different amplitudes of HV pulse.

Halfwave Voltage for the Pockels Cell: Uλ/2=3600V @532nm.

Fig.1. V(pulse) = 2800 V Fig.2. V(pulse) = 3600 V